Switched capacitor amplifiers have become increasingly popular for use with metal oxide semiconductor (MOS) technology in which good capacitors and good operational amplifiers may be readily implemented. For background in this field, reference is made to three prior articles as follows:
(1) R. Gregorian, "High-Resolution Switched-Capacitor D/A Converter, Microelectronics Journal, Vol. 12, No. 2, pp. 10-13, 1981. PA0 (2) R. Gregorian, An Offset-free Switched-Capacitor Biquad", Microelectronics Journal, Vol. 13, No. 4, pp. 37-40, 1982. PA0 (3) K. Martin, "New Clock Feedthrough Cancellation Technique for Analogue MOS Switched-Capacitor Circuits", Electron, Lett., Vol. 18, No. 1, pp. 39-40, Jan. 1982,
One problem which is often encountered in switched capacitor amplifiers is the error introduced by the operational amplifier offset voltage. This is the voltage which appears at the output of an operational amplifier when the positive and negative inputs to the operational amplifier are tied together; or the input voltage between the positive and negative input terminals of an operational amplifier required to produce a zero output voltage from the operational amplifier. Another problem in switched capacitor amplifiers involves the switching of the output of the circuit back to zero or to ground during each cycle of operation. In order to have an accurate output voltage during the time when the output voltage is being sampled, and to then restore the output voltage to zero each cycle, an operational amplifier with a very high slew rate is required. Thus, the sampling rate, or the rate of operation of the switched capacitor amplifier may be limited by the slew rate of the operational amplifier. In addition, the switching of the output voltage to near ground on each cycle may introduce noise into the output circuitry.
Accordingly, principal objects of the present invention are to provide an offset compensating switched capacitor amplifier in which a relatively low slew rate operational amplifier may be employed.